800G to 1.6T: lanes, optics and the fabric.

Three interfaces hide behind one speed label.

A transceiver sits between the host electrical interface and an optical interface that must match its peer. Above both sits the logical Ethernet arrangement: one port or several independent ports. Record all three. “800G OSFP” alone says too little to determine the host lane rate, number of optical channels, connector arrangement or supported breakout.

This distinction becomes more important at 1.6T. More bandwidth in one package can consolidate hardware, but the useful result depends on the topology: a wider link to one neighbor, multiple links to different peers, or a supported combination of ports sharing the package.

800G can already use 200G optical lanes.

Marvell’s Petra brief gives a concrete gearbox example: eight 100G electrical lanes mapped to four 200G optical channels for 800G DR4/FR4 implementations. A 200G optical channel therefore does not require every host-side lane to run at 200G. The gearbox is part of the transceiver’s architecture. Petra product brief

Marvell Ara specifies eight 200G host lanes and eight 200G optical lanes for 1.6T. It also lists several logical operating modes, including 2×800G and 4×400G. These are DSP capabilities; the finished module’s optical design, management applications and host support determine which are usable. Ara product brief

Optical channels do not tell you the fiber count.

Parallel optics place channels on separate fiber paths. Wavelength-multiplexed optics combine channels onto fibers. A DR8 implementation and an FR-family WDM implementation can have the same aggregate rate while needing very different patching, connector counts and breakout arrangements. The OSFP MSA illustrates these architectures separately. OSFP optical architecture examples

A fiber shuffle can regroup exposed parallel paths. It cannot separate wavelength channels inside an ordinary FR4 duplex link. Similarly, two FR4 optical engines in one module are not automatically interchangeable with one FR8 optical link. The far end must match each optical application.

For every proposed breakout, draw the logical ports over the electrical lanes and then over the optical paths. Check which lane groups must remain together through FEC, mapping and link training. Connector shape and total throughput cannot establish that grouping. How that affects a shuffle matrix ↗

Faster ports and more neighbors are different objectives.

Broadcom’s Tomahawk 6 lists chip configurations of 64×1.6T, 128×800G, 256×400G and 512×200G. Each totals 102.4T. These are silicon capabilities; the switch’s cages, board design and operating software determine the exposed configuration. BCM78910 series

The engineering choice is how to allocate that capacity. Wider links increase bandwidth to each neighbor. Narrower independent links increase the number of neighbors at the same aggregate switching capacity. A 1.6T module with supported breakout can package multiple links without requiring one physical module per logical port.

For a bill of materials, count logical links and physical transceivers separately. A two-port module occupies one cage but serves two optical endpoints. A shuffle enclosure changes the fiber packaging and mapping; it is not an additional transceiver. Include assemblies, connector interfaces, patch panels, spares and the required distribution of power and cooling.

The cage and cooling interface are part of compatibility.

Do not infer mechanical or electrical interchangeability from the OSFP family name. OSFP MSA Rev 5.22 distinguishes OSFP1600 host cages from earlier OSFP/OSFP800 arrangements. Its compatibility table supports older modules in the newer cage but advises against the reverse direction, citing speed, contact and retention/retrieval concerns. Platform support is an additional requirement. Rev 5.22, Table 5

Integrated and riding heat sinks also need the intended cage geometry and contact arrangement. Check the exact module power requirement against the host’s supported power and cooling envelope at the intended inlet conditions. A lower watts-per-bit figure does not establish lower watts per module or adequate thermal margin in a fully populated system.

Evaluate short supported copper paths separately when comparing the installed link cost. Moving to a new optical speed does not require replacing every short interconnect with optics. Route length, electrical channel budget, bend and access requirements still govern the choice.

Plan the migration by connection class.

Separate node-to-leaf, leaf-to-spine and any longer-reach links. For each class, record the required per-endpoint capacity, number of peers, installed distance and desired failure behavior. Then choose the logical port arrangement before selecting a module.

1. Host: exact switch or adapter, firmware/NOS, cage, host lane rate and permitted port splits.
2. Module: supported application, electrical-to-optical mapping, optical PMD, power and thermal construction.
3. Peer and fiber: matching lane groups, signaling, FEC, wavelength plan, connector positions, polarity and complete optical budget.
4. Operations: error and FEC baselines, temperature under sustained load, breakout behavior, replacement compatibility and spare stock.
5. Fabric: intended rail/plane mapping, congestion behavior and capacity during the failures the design must tolerate.

Bring up representative connections before committing the plant at scale. Validate the exact combination that will be deployed, then retain its module, host, software and cable revisions. Use 1.6T where it improves the planned fabric; retain 800G where it already delivers the required connectivity and operating economics.

Sources and applicability

Original WBN engineering reference checked 2 November 2026. Lane rates below are nominal classes, not encoded PHY bit rates or baud rates. Semiconductor briefs describe building blocks; they do not establish the operating modes, power or qualification of an unspecified finished module. Use the selected host, module and specification revisions.

1. Marvell Petra — 800G PAM4 gearbox product brief

   8×100G host to 4×200G optical interface; April 2026 revision.

2. Marvell Ara — 1.6T PAM4 optical DSP product brief

   Eight 200G host and optical lanes and supported DSP modes; November 2024 revision.

3. Broadcom BCM78910 series — Tomahawk 6

   102.4T chip capacity and logical interface configurations; not a promise of a particular chassis port layout.

4. OSFP MSA Module Specification Rev 5.22

   August 2025: Table 5 compatibility, thermal and RHS provisions, and optical architecture examples. Interface examples do not establish final IEEE standard status.

5. NVIDIA LinkX — 100G PAM4 product-line overview

   Concrete eight-channel 800G and twin-port arrangements; platform-specific optical and thermal context.

Continue the engineering record

• Optical shuffle architecture and multi-plane scaling
• ConnectX-7/8 interfaces and OSFP IHS/RHS
• Tomahawk 6 and usable fabric capacity
• Define the complete optical interface